• B. Nishanth Kumar
• M. Kiran Kumar
• Amrita Sajja
• T.SR.CH.Murthy

Addition is one of the most basic operations performed in all computing units, including microprocessors and digital signal processors. It is also a basic unit utilized in various complicated algorithms of multiplication and division. Efficient implementation of an adder circuit usually revolves around reducing the cost to propagate the carry between successive bit positions. Hence, a new high-speed and area efficient adder architecture is proposed using proposed logic to perform the multi-operand binary addition that consumes substantially less area, low power and drastically reduces the adder delay. Further, as an enhancement of this project reversible logic gates are introduced to optimise constrained parameters

Multi operand adder, Latency, Density, Ripple carry adder, Reversible logic, Propagation.

"Design of High Speed Multi-Operand RCA Based Binary Tree Adder Using Reversible Logic Gates", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.11, Issue 5, page no.h107-h112, May-2024, Available :http://www.jetir.org/papers/JETIR2405713.pdf

"Design of High Speed Multi-Operand RCA Based Binary Tree Adder Using Reversible Logic Gates", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.11, Issue 5, page no. pph107-h112, May-2024, Available at : http://www.jetir.org/papers/JETIR2405713.pdf