UGC Approved Journal no 63975(19)

ISSN: 2349-5162 | ESTD Year : 2014
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Volume 11 | Issue 5 | May 2024

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Published in:

Volume 11 Issue 4
April-2024
eISSN: 2349-5162

UGC and ISSN approved 7.95 impact factor UGC Approved Journal no 63975

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Published Paper ID:
JETIR2404897


Registration ID:
537619

Page Number

i717-i726

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Title

Simulation Based Study On ETAP Of 132/33/11/0.415 KV Substation For Short Circuit Analysis

Abstract

Using ETAP software, this study examines short circuit behaviour in a 132/33/11/0.415 kV substation. With ETAP, a comprehensive substation model with real-world component data is going to be constructed. The study will investigate the fault currents that emerge from simulating different fault scenarios (singleline-to-ground, line-to-line, three-phase) at different sites. Through this research, any vulnerabilities for substation upgrades will be identified, protective relay settings will be optimized, and sufficient switchgear capacity will be guaranteed. In the end, by improving the substation's design, protection system, and general resilience, this simulation-based method employing ETAP will help ensure its safe and dependable operation.

Key Words

SLG single line to ground,LL line to line,DLG double line to ground,ETAP,Short circuit

Cite This Article

"Simulation Based Study On ETAP Of 132/33/11/0.415 KV Substation For Short Circuit Analysis ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.11, Issue 4, page no.i717-i726, April-2024, Available :http://www.jetir.org/papers/JETIR2404897.pdf

ISSN


2349-5162 | Impact Factor 7.95 Calculate by Google Scholar

An International Scholarly Open Access Journal, Peer-Reviewed, Refereed Journal Impact Factor 7.95 Calculate by Google Scholar and Semantic Scholar | AI-Powered Research Tool, Multidisciplinary, Monthly, Multilanguage Journal Indexing in All Major Database & Metadata, Citation Generator

Cite This Article

"Simulation Based Study On ETAP Of 132/33/11/0.415 KV Substation For Short Circuit Analysis ", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.11, Issue 4, page no. ppi717-i726, April-2024, Available at : http://www.jetir.org/papers/JETIR2404897.pdf

Publication Details

Published Paper ID: JETIR2404897
Registration ID: 537619
Published In: Volume 11 | Issue 4 | Year April-2024
DOI (Digital Object Identifier):
Page No: i717-i726
Country: Raipur, Chhattisgarh, India .
Area: Engineering
ISSN Number: 2349-5162
Publisher: IJ Publication


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