• Rajesh Ranjan
• Ashish Dubey

The positive attribute of lower power usage has made reversible logic quite popular in recent years. RM (Reversible multiplexers), RDM (reversible de-multiplexers), RE (reversible encoders), and RD (reversible decoders) are among several kinds of combinational circuits used in this design. Researchers and engineers have recently been interested in reversible logic devices and circuits because of their potential applications in fields like digital signal processing, nanotechnology, low-power CMOS, quantum computing, computer graphics, optical computing & encryption. Designing low-power, high-efficiency CDF (COMS DG FINFET) Reversible MUX circuits is difficult. This work explores the internal logic structure and circuit operating of a CMOS Reversible MUX circuit designed using CMOS & CDF components. CDF & CMOS-based CRM (CMOS Reversible MUX) is developed at transistor level. These CRM are simulated employing cadence tool in 90nm technology, and their performance is analyzed contrasting to that of 90nm CDF technology. For greater mobility and transistor scaling compared to other methods, CRM with CDF approaches delivers low leakage current and low leakage power.

CMOS, DG FINFET, CMOS Reversible MUX, Leakage Power, Cadence.

"Analysis of Low-Power CRM's Design and Performance Utilizing CDF", International Journal of Emerging Technologies and Innovative Research (www.jetir.org), ISSN:2349-5162, Vol.11, Issue 6, page no.a34-a38, June-2024, Available :http://www.jetir.org/papers/JETIR2406005.pdf

"Analysis of Low-Power CRM's Design and Performance Utilizing CDF", International Journal of Emerging Technologies and Innovative Research (www.jetir.org | UGC and issn Approved), ISSN:2349-5162, Vol.11, Issue 6, page no. ppa34-a38, June-2024, Available at : http://www.jetir.org/papers/JETIR2406005.pdf